Individual semiconductor devices in integrated circuits (ICs) are interconnected by means of one or more patterned conductive layers overlying the semiconductor devices. It is particularly advantageous to provide a plurality of patterned conductive layers separated from one another and from the underlying semiconductor devices by layers of insulating material. This practice permits a higher density of interconnections per unit area than can be provided by a single patterned conductive layer, and simplifies design by permitting interconnection paths implemented in one conductive layer to cross over interconnection paths implemented in other conductive layers.
Multilevel interconnection structures are conventionally made by alternately depositing and patterning layers of conductive material, and layers of insulating material. Small holes are formed in the insulating layers to permit interconnection to underlying conductive layers or device contacts. There is a need to improve the operative performance of the device contacts, typically a metal silicide. In particular, the resistivity of the contacts must be reduced to improve circuit performance. The device contacts are typically a silicide film, which is often a titanium silicide (TiSi) or a cobalt silicide (CoSi). One of the ways to reduce the resistivity of the contacts is to employ a nickel silicide (NiSi) instead of TiSi or CoSi. The NiSi provides for a lower contact resistance, allowing further miniaturization of semiconductor device.
During formation of the contact openings, contaminants and impurities often form on the silicon surface of the wafer. Sometimes, because of the increasingly small size of the holes and/or the high aspect ratio of the holes, it is difficult to clean the bottoms of the holes subsequent to etching. The presence of contaminants and impurities contributes significantly to high contact resistance because the contaminants and impurities act as insulators between the substrate surface and the metal that is to be later deposited into the hole. With this in mind, regardless of the type of silicide used, the device contacts must be thoroughly cleaned as part of the manufacturing process.
Referring to FIG. 1, a diagram of a portion 100 of a semiconductor device is shown. Oxide portions 102A and 102B are disposed on top of NiSi layer 104. In a typical manufacturing process, the oxide is applied as a layer over the silicide layer 104, followed by a dry etch process to form a cavity 105, and to expose the silicide layer 104, as is known in the art.
FIG. 2 illustrates, conceptually, the chemical arrangement of the nickel silicide layer 104. In this case, both the nickel atoms, indicated as “Ni”, and the silicon atoms, indicated as “Si”, have oxygen atoms (indicated as “O” attached). These oxygen atoms interact with the Nickel and Silicon atoms to form an oxide layer on the surface of the contact. This oxide layer increases contact resistance, and is therefore preferably removed or minimized prior to the filling of cavity 105 with a conductive material, such as tungsten, to form a connection to a subsequent metallization layer (not shown).
Prior art methods of contact clean for NiSi contacts include removing the oxygen from the Si oxide, but not from the Ni oxide, thereby performing a suboptimal contact clean. As NiSi use is becoming more prevalent in semiconductor manufacturing, there is a need to improve the performance of semiconductors that employ an NiSi technology.